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One Chip Running Multiple Virtual Radios

Our world is increasingly defined by software. Even sectors that used to rely mainly on hardware are changing rapidly. From use cases like self-driving cars to the inspection of factory plants, digital assets make the difference.

In line with this trend, Software Defined Radio (SDR) has emerged. With SDR, transceiver components (such as mixers, demodulators or decoders) that are typically implemented on hardware are now implemented by means of software. Software is not only easier and faster to develop, but also easier to upgrade and customize.
However, a pure software approach also has significant drawbacks. Although SDR shortens development cycles, programmers need to resort to field-programmable gate array (FPGA) hardware solutions when low latency and high throughput is required. Unfortunately, hardware coding is a time-consuming process in comparison to software-based solutions. 

In this demo, researchers from imec - Ghent University present an approach to solve this software-hardware dilemma by building a platform with a software-hardware co-design philosophy.  On this platform, researchers can use software APIs as the building blocks for their design. These APIs, in turn, are associated with FGPA accelerators and an on-chip data and control network. In this way, the platform offers the same flexibility and ease-of-use as developing software, while still achieving the high performance typically associated with hardware design. The platform further allows to instantiate multiple transceiver chains that can operate simultaneously on a single SDR device, just like running multiple programs on the same CPU, to maximize utilization of FPGA accelerators. 

This demo showcases simultaneous detection of two IEEE 802.11 and eight IEEE 802.15.4 traffic streams in concurrent and overlapping channels via two virtual radios using the same PHY hardware accelerators.

Copyright imec 2017